NI Ultiboard软件通过提供适合PCB布局和布线的灵活环境，帮助学生了解布局过程和工业操作。学生可以从NI Multisim基于SPICE的交互式仿真中获取设计，或者利用焊盘图案中内置NI Ultiboard数据库的部件从头学起。Ultiboard包含许多省时的特性，有助于学生迅速学习和理解PCB的布局过程。例如，借助电子表格查看， 学生可在电路图上将元器件拖放到自己理想的位置。然后，学生可通过“跟我来”布线或绘制线路，对全部的设计网络进行轻松布线。
DO-254/CTS is a fully customized hardware and software platform that augments target board testing to increase verification coverage by test and satisfy the verification objectives of DO-254/ED-80. The target design runs at-speed in the target device mounted on the custom daughter board. The simulation testbench is used as test vectors to enable requirements-based testing with 100% FPGA pin-level controllability and visibility necessary to implement normal range and abnormal range tests. The FPGA testing results are captured at-speed and displayed using a simulator waveform viewer for advanced analysis and documentation.
SDSoC™开发环境提供了一个熟悉的嵌入式C/C++/OpenCL应用程序开发体验，包括一个易于使用的Eclipse IDE和一个用于异构Zynq®SoC和MPSoC部署的全面设计环境。凭借行业的第一个C/C++/OpenCL全系统优化编译器，SDSoC提供了系统级分析、可编程逻辑的自动化软件加速、自动化系统连接生成和库来加快编程速度。它还使最终用户和第三方平台开发人员能够快速定义、集成和验证系统级的解决方案，并为他们的最终客户提供一个定制的编程环境。
KTechlab是一个用于微控制器和电子设备的IDE。
APM WinMachine is software for automated calculation and design of equipment and structures in mechanical engineering.
Qucs is an integrated circuit simulator which means you are able to setup a circuit with a graphical user interface (GUI) and simulate the large-signal, small-signal and noise behaviour of the circuit. After that simulation has finished you can view the simulation results on a presentation page or window.
英飞凌设计师是第一个在互联网应用中结合模拟和数字仿真功能的在线原型引擎。它只需要 Web 浏览器，非常适合支持客户为定义的应用程序选择正确的产品。英飞凌设计器可在极短的时间内直观地工作，既不需要安装也不需要许可证。请从以下应用电路之一开始。
RedSCH是RedEDA平台下的一个原理图设计软件
LePlan是一款已通过客户验证的数字集成电路布图规划工具。该工具针对性地破解传统手工布图规划难以解决的耗时和收敛性差等多方面难题，可提供可视化数据流分析图和最快收敛的布图规划方案，旨在助力数字电路设计实现更具挑战性的性能、功耗和密度要求。特别地，LePlan还高度融合后端布局布线技术，降低集成风险
英特尔® SoC FPGA 嵌入式开发套件 （SoC EDS） 是英特尔® SoC FPGA 嵌入式软件开发的综合工具套件。它包括开发工具、实用程序和设计示例，以启动固件和应用程序软件开发。
Ngspice is a mixed-level/mixed-signal circuit simulator. Its code is based on three open source software packages: Spice3f5, Cider1b1 and Xspice. It is the open source successor of these venerable packages. Many, many modifications, bug fixes and improvements have been added to the code, yielding a stable and reliable simulator. Therefore, besides being used as a standalone simulator, Ngspice has been incorporated into many projects, see our simulation environments page. Spice3 does not need any introduction, is the most popular circuit simulator. In over 30 years of its life Spice3 has become a de-facto standard for simulating circuits. Cider couples Spice3f5 circuit level simulator to DSIM device simulator to provide greater simulation accuracy of critical devices. DSIM devices are described in terms of their structures and materials. Xspice is an extension to Ngspice that provides code modeling support and simulation of digital components through an embedded event driven algorithm.
eSim （以前称为Oscad / FreeEDA）是一款用于电路设计，仿真，分析和PCB设计的开源EDA工具。 它是一个使用开源软件构建的集成工具，如KiCad和Ngspice。 eSim在GPL下发布。
HES-DVM is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accurate and speed-effective SoC emulation models reducing test time and a risk of silicon re-spins.
莱迪思ORCAstra™软件是一个基于PC的图形用户界面，允许用户对片上寄存器的控制位进行编程来配置FPGA的运作模式。这可以帮助您快速评估配置选项，而无须经过漫长的重新编译过程，或对电路板作出更改。在图形用户界面中创建的配置可以保存到存储器，重新加载供以后使用。宏功能也可支持基于脚本的配置和测试。图形用户界面也可以用来显示实时的系统状态信息。 ORCAstra软件不干扰FPSC的FPGA部分的编程。
LePlan是一款已通过客户验证的数字集成电路布图规划工具。该工具针对性地破解传统手工布图规划难以解决的耗时和收敛性差等多方面难题，可提供可视化数据流分析图和最快收敛的布图规划方案，旨在助力数字电路设计实现更具挑战性的性能、功耗和密度要求。特别地，LePlan还高度融合后端布局布线技术，降低集成风险
PhyBolt提供完整的IC-PKG-BOARD系统功耗与热耦合解决方案，内置的求解器能够精确模拟传导行为。支持自定义网格设置参数，根据精度需求和算力选择最合适的参数方案。支持不同格式CAD文件与芯片版图GDS文件导入、自带多种热模型。
RedPKG是RedEDA平台下的封装基板设计工具，精度支持到纳米级别。可以满足用户进行FP、WB等类型封装的设计。
LePlace是一款支持成熟及先进工艺的布局及物理优化工具，基于创新的布局布线技术和物理优化算法，主要用于超大规模集成电路布局，内嵌创新性的拥塞及时序驱动的布局技术，可以满足超大规模复杂设计所需的大容量和高性能要求
高性能多功能可编程适配解决方案用于FPGA原型化平台，可一卡替代多种原型验证进口子板，具备强大的功能和适配能力，可进一步加快验证收敛，助力软硬件协同开发，提高芯片设计的研发效率。